This invention relates to digital processing apparatus, in particular to a system for controlling the number of iterations of nested program loops in a digital processing apparatus.
In the use of digital data processing apparatus it is often necessary, or desirable, to perform sets of operations iteratively in nested loops. This is particularly so in array processing. For example, in digital filtering of a signal represented by an array of samples of a signal waveform convolution is typically performed. A general expression representing the convolution of the signal x by the filter characteristic h is as follows: ##EQU1## In this example each of the data points representing the waveform x is first multiplied by the corresponding coefficient of h and the sum of those products is added; thereafter, the coefficients are shifted by one position and this process is repeated. The latter, inner loop, involving the multiplication and addition for each of the coefficients of the filter, is repeated until the entire data set representing the signal waveform has been convolved with the filter characteristics, thereby terminating one pass through the outer loop.
One objective ordinarily sought in array processing, particularly in signal processing, is to perform computation at high speed. This is especially important where real time processing is desirable. Where the computation algorithm requires the repetitive execution of a set of statements in a loop, some means must be provided for determining the number of times the loop is to be repeated and counting the number of passes through the loop. Where that loop is nested within another loop, some means must be provided for reinitializing the inner loop counter for each pass of the outer loop. In conventional nested loop programming, as would be used with known microprocessors particularly suitable for signal processing, for example the TMS 320 microprocessor manufactured by Texas Instruments Corporation and the F9445 microprocessor manufactured by Fairchild, Inc., some register, or memory location, must be used as a counter for each of the loops involved. To initialize the counter a program step is needed to fetch from memory the value representing the number of passes to be made through the loop and place it in the register. To ascertain the current number of passes made through the loop, the value in the register must be incremented or decremented with each pass, and to determine whether the full number of passes has been accomplished, the value in the register must be compared to some reference, or tested with each pass, each of which requires a separate program step. These program steps require additional time. Since this additional time decreases the speed of processing, it would be desirable to eliminate such program steps.